UNIV. NEWS. NORTH-CAUCAS. REG. TECHNICAL SCIENCES SERIES. 2016; 4: 11-17
http://dx.doi.org/10.17213/0321-2653-2016-4-11-17
FAULT TOLERANT LUT FPGA
Tyurin Sergey Feofentovich – Doctor of Technical Sciences, professor, department «Automation and Telemechanics», Perm National Research Polytechnic University, Perm, Russia. Е-mail: tyurinsergfeo@yandex.ru
Prokhorov Andrey Sergeevich – post-graduate student, department «Automation and Telemechanics», Perm National Research Polytechnic University, Perm, Russia. Е-mail: npoxop007@yandex.ru
Abstract
We consider the logical elements for high-reliability, radiation-resistant FPGA type FPGA. Proposed elements have the ability to maintain the original function in case of failure of two or three transistors in each transistor structure. We analyze the complexity of the proposed elements with the elements, retorts failure of one transistor in each transistor structure. A comparison on the probability of failure-free operation with tinted structures LE FPGA FPGA.
Keywords: FPGA; logic functions; logic element; Fault-tolerant Look Up Table FPGA - FTLUT; radiation resistance; transistor; redundancy; reliabilities; triple redundancy; quadrupling.
Full text: [in elibrary.ru]
References
1. Ul'man Dzh.D. Vychislitel'nye aspekty SBIS [Computational Aspects of VLSI]. Edit by P.P. Parkhomenko. Moscow, Radio i svyaz', 1990, 480 p.
2. Stepchenkov Yu.A., Denisov A.N., D'yachenko Yu.G., Grinfel'd F.I., Filimonenko O.P., Morozov N.V., Stepchenkov D.Yu. Biblioteka elementov dlya proektirovaniya samosinkhronnykh poluzakaznykh mikroskhem serii 5503/5507 i 5508/5509 [Library elements for designing self-timed chip semicustom series 5503/5507 and 5508/5509]. Moscow, IPI RAN Publ., 2008, 296 p.
3. Bazovye matrichnye kristally. Kompaniya NPK «Tekhnologicheskii tsentr» [Gate array // Company SPC "Technology Center"]. Available at: http://www.asic.ru/index.php?option=com_content&view=article&id=52&Itemid=92 (accessed 27.06.2015).
4. Gavrilov S.V., Denisov A.N., Konyakhin V.V., Makartseva M.M. SAPR «Kovcheg 3.0» dlya proektirovaniya mikroskhem na BMK serii 5503, 5507, 5521 i 5529 [CAD "Ark 3.0" for the design of chips on the BMK series 5503, 5507, 5521 and 5529]. Moscow, 2013, 295 p.
5. Denisov A.N., Fomin Yu.P., Konyakhin V.V., Fedorov R.A. Biblioteka funktsional'nykh yacheek dlya proektirovaniya poluzakaznykh mikroskhem serii 5503 i 5507 [Functional cell library for designing chips semicustom series 5503 and 5507]. Moscow, Tekhnosfera Publ., 2012, 304 p.
6. Ugryumov E.P. Tsifrovaya skhemotekhnika [Digital circuitry: tutorial]. St. Petersburg, BKhV-Peterburg, 2004, 518 p.
7. Tsybin S. Programmiruemaya kommutatsiya PLIS: vzglyad iznutri [Software switching PLD: an outward glance]. «Komponenty i tekhnologii». Available at: http://www.kit-e.ru/articles/plis/2010_11_56.php (accessed 16.12.2014).
8. Zolotukha R., Komolov D. Stratix III – novoe semeistvo FPGA firmy [Stratix III — a new family of FPGA from Altera]. «Komponenty i tekhnologii». Available at: http://kit-e.ru/assets/files/pdf/2006_12_30.pdf (accessed 28.11.2015)
9. Ispol'zovanie resursov PLIS Stratix III firmy Altera pri proektirovani mikroprotsessornykh yader [Resource use Stratix III FPGA from Altera the design of microprocessor cores]. «Komponenty i tekhnologii». Available at: http://www.kit-e.ru/assets/files/pdf/2010_02_39.pdf (accessed 27.11.2015)
10. Glebov A.L. SP-BDD-model' tsifrovykh KMOP-skhem i ee prilozheniya v optimizatsii i modelirovanii [SP-BDD-model digital CMOS circuits and its applications in optimization and simulation]. «Nauka i obrazovanie: nauchnoe izdanie MGTU im. N.E. Baumana». Available at: http://technomag.edu.ru/doc/49908.html (accessed 28.06.2015).
11. Sostav serii BMK 5529 [The composition of the BMC 5529 series]. Sait kompanii NPK «Tekhnologicheskii tsentr». Available at: http://www.asic.ru/index.php?option=com_content&view=article&id=52&Itemid=92 (дата обращения 16.03.2016)
12.Kamenskih, A.N., TyurinS.F., Stepchenkov Y.A. The problem of a fault-tolerant self-timed circuit analysis on semi-modularity and energy-reliability // Russian Electrical Engineering. 2015. № 11. Pp. 602 – 609.
13. Tyurin S.F., Gromov O.A., Grekov A.V. Funktsional'no-polnyi tolerantnyi element FPT+ [Functionally full-tolerant element FPT +]. Nauchno-tekhnicheskie vedomosti Sankt-Peterburgskogo gosudarstvennogo politekhnicheskogo universiteta, 2011, no. 1(115), pp. 24 – 31. [In Russ.]
14. Tyurin S.F. Yacheika staticheskoi operativnoi pamyati [Cell of static random access memory]. Patent RF, no. 2573226, 2016.
15. Chekmarev S.A. Sposob i sistema in"ektsii oshibok dlya testirovaniya sboeustoichivykh protsessorov bortovykh sistem kosmicheskikh apparatov [Method and system for testing the error injection failures stable processors onboard spacecraft systems]. Vestnik Sibirskogo gosudarstvennogo aerokosmicheskogo universiteta im. akademika M.F. Reshetneva, 2014, no. 4 (56). Available at: http://cyberleninka.ru/article/n/sposob-i-sistema-inektsii-oshibok-dlya-testirovaniya-sboeustoychevyh-protsessorov-bortovyh-sistem-kosmicheskih-apparatov (accessed: 16.12.2015).
16. Tyurin S.F., Zarubskii V.G. Tranzistornoe rezervirovanie v logicheskom elemente FPGA DC LUT [Transistor redundancy in a logical element FPGA DC LUT]. Vestnik Povolzhskogo gosudarstvennogo tekhnologicheskogo universiteta. Seriya: Radiotekhnicheskie i infokommunikatsionnye sistemy, 2016, no. 2 (30), pp. 75 – 83. [In Russ.]